The present invention relates to a process of etching semiconductor substrates.
In the manufacture of integrated circuits, silicon-containing layers on a substrate are etched to form gates, vias, contact holes, trenches, and/or interconnect lines. The etched areas are later filled with electrically conductive material to form electrically conductive interconnects or with insulating materials in the case of gate structures. Examples of such silicon-containing materials include silicon dioxide, silicon nitride, polysilicon, metal silicide, and monocrystalline silicon. The substrate may also contain layers of other materials, for example metal conductor layers, insulative layers, anti-reflective layers, or diffusion layers, among others.
In a typical etching process, a patterned mask composed of a material less susceptive to etching, such as photoresist, or a hard mask layer such as silicon dioxide or silicon nitride, is formed over the substrate. Thereafter, the substrate is placed within a process chamber and etched by a plasma of etchant gas in the chamber. The residue of material deposited on the substrate is then etched. The composition of the residue is dependent upon the etchant gas that is used, the substrate material, and composition of the mask or resist layer. The etching process is illustrated schematically in FIGS. 1a through 1d. These figures are shown merely as examples of substrates and are not intended to limit the scope of the invention. In a typical configuration, as shown in FIG. 1a, the substrate 25 comprises a metal silicide layer 22 formed over a doped or undoped polysilicon layer 24 which is formed over a dielectric layer 26, such as a silicon dioxide layer. Patterned resist features 28 are formed over the substrate to define areas to be etched. FIG. 1b shows the same substrate after etching. In another example, FIG. 1c shows a silicon substrate 36 having a mask layer 32 formed over a thin silicon dioxide layer 34. FIG. 1d shows the same substrate after etching. The layers of the substrate may include but are not limited to the following: metal silicide, silicon, polysilicon, silicon nitride, or silicon dioxide layers; diffusion barrier and/or adhesion promoting layers of Ti, TiN, Ta, TaN, W, WN; metal layers comprising aluminum, copper, tungsten, and alloys thereof; antireflection layers of TiN, silicon oxynitride or organic anti-reflective material; dielectric layers of silicon dioxide, silicate glass, PSG, BPSG, Si3N4, and TEOS deposited glass; or the substrate itself.
One problem in etching such substrates is the occurrence of critical dimension microloading. The critical dimensions (CD) are the predefined dimensions of the etched features which affect the electrical properties of the features. For example, the electrical resistance of a metal interconnect line is proportional to its cross-sectional area which is a function of its height and width. As the dimensions of etched features become smaller due to advances in etching technology, the cross-sectional area of the interconnected lines is a critical dimension that should be maintained as close as possible to the desired dimensions to provide the required electrical resistance levels. Especially for electrically conducting features, tapering cross-sections, cross-sectional profiles that vary as a function of the spacing between the features, or other variations in the profile of the features are not desirable. Critical dimension (CD) measurements are typically made using top-down scanning electron micrographs of the substrate before and after etching or by suitable electrical measurements. Critical dimension microloading is a measure of the variation in critical dimensions between dense and isolated regions of the substrate. The dense regions have a high density of etched features and the isolated regions have a low density of etched features. It is important and desirable to reduce CD microloading effects across the substrate to maintain uniform critical dimensions for all the etched features.
When a silicon-containing layer on a substrate is etched by conventional methods, etched or sputtered silicon species combine with gaseous species to form a sidewall passivation layer 40 on the sidewalls of the etched features. When the silicon species combine with oxygen, a sidewall passivation layer 40 comprising silicon dioxide is formed, and this passivation layer 40 controls the rate of etching of the silicon-containing layer. However, conventional processes often result in tapering of the profile of the etched features, and may also result in CD microloading of etched features that are in dense and isolated regions on the substrate. This occurs because in the isolated regions of the etched features (where there are few etched features per unit area) there tends to be thicker sidewall passivation layers deposited on the etched features than in the dense regions (where there are more etched features per unit area).
In current etching techniques, for example those using an etchant gas comprising HBr; Cl2, and Hexe2x80x94O2, profile tapering and CD microloading occurs primarily due to backsputtering of the etched silicon, as shown in FIGS. 2a and 2b. FIG. 2a represents a dense feature portion of a silicon-containing substrate 25 and FIG. 2b represents a portion of the substrate 25 where the etched features are relatively isolated. As the substrate 25 is etched, backsputtering of silicon occurs due to the energetic bombardment of the plasma species on the substrate. The backsputtered silicon (as represented by the arrows 42) combines with the O2 to form SiO2 that is deposited on the sidewalls of the etched feature as the silicon dioxide containing passivation layers 40a and 40b. Comparing FIGS. 2a and 2b, the passivation layers 40a on the etched features at the dense regions is not as thick as the passivation layers 40b formed on the etched features in the isolated regions due primarily to the localized geometry of the etching features and the resulting relatively lower area of exposed silicon-containing material. These varying thicknesses lead to excessive profile tapering and CD microloading across the substrate.
FIG. 3 is an etch simulation model showing the difficulty in minimizing tapering of the profile of the etched feature while also reducing CD microloading at the dense and isolated regions on the substrate. It is seen that tapering can be reduced to zero (i.e., a profile angle of 90 degrees) and CD microloading can also be reduced in the dense and isolated regions of the substrate, by utilizing a more isotropic or xe2x80x9cchemicalxe2x80x9d etching process. In isotropic etching processes, the etching rate through the sidewall of the etched feature is higher than in conventional anisotropic or less chemical etching processes. The isotropic etching process reduces the thickness of the thicker sidewall passivation layers that are formed on the etched features in some of the regions of the substrate by reacting with and partially removing these layers. However, the problem with using such chemical or isotropic etching is that the etched features have narrower or skinner profiles because etching proceeds along the sidewall at higher rates. Thus it is difficult to balance low degrees of tapering and CD microloading effects, with the high degree of anisotropic etching that is desired on the substrate.
Therefore there is a need for an etching process that provides substantially anisotropic etching, with reduced tapering of etched features, and low critical dimension microloading across the substrate. There is a further need for an apparatus capable of providing such etching characteristics.
The aforementioned problems have been overcome by the present invention. In one aspect, the present invention comprises a method of etching silicon-containing material on a substrate, comprising the steps of placing the substrate with the silicon containing material in a chamber, and forming a plasma from a process gas which is introduced into the chamber, the process gas comprising an etchant gas comprising halogen species absent fluorine, and an additive gas comprising fluorine species and carbon species.
In another aspect, a method of etching silicon-containing material on a substrate comprises the steps of placing the substrate with the silicon-containing material in a chamber and forming a plasma from process gas comprising one or more HBr and HCl, one or more of Cl2 and Hl, and a fluorocarbon gas.
In yet another aspect, a method of etching a substrate comprising silicon-containing material comprises the steps of placing a substrate with the silicon-containing material in a chamber and forming a plasma from process gas comprising HBr, Cl2, and CF4.
In another aspect, a method of etching silicon-containing material on a substrate comprises the steps of placing the substrate with the silicon containing material in a chamber and forming a plasma from a process gas comprising an etchant gas comprising halogen species absent fluorine and additive gas comprising carbon species and hydrogen species.
In a further aspect, a method of etching silicon-containing material on a substrate comprises the steps of placing the substrate with the silicon-containing material in a chamber and forming a plasma from process gas comprising one or more HBr and HCl, one or more of Cl2 and Hl, and CH4.
In yet another aspect, an apparatus for etching a substrate comprising silicon-containing material, the apparatus comprising a support adapted to support the substrate; a controller adapted to regulate gas flow control valves to introduce a process gas into the chamber, the process gas comprising an etchant gas comprising halogen species absent fluorine, and an additive gas comprising fluorine species and carbon species; a plasma generator to energize the process gas to form a plasma to process the substrate; and an exhaust to exhaust the process gas.